Hybrid Energy Storage Systems and their Applications


Prof. Naehyuck Chang

(Department of Electrical Engineering and Computer Science Seoul National University, Korea )


Storage of excessive electrical energy can save peak load demand
efficiently, provide quality spinning reserve, and thus reduce
over-investment in the electricity generation facilities. So far,
development of a better battery technology has been a main activity to
develop high-performance energy storage systems (ESS). However, despite
active research on new electrical energy storage device technologies
(batteries or equivalents), it is not likely to have an ultimate
high-efficiency, high power/energy capacity, low-cost, light-weight, and
long-cycle life storage device in the near future. In other words, there
is no single type of storage device that fulfills all these requirements.

Computer systems have been facing with the storage (memory) problem over
decades; there is still no single type of memory device that provides
high speed, low-cost, large-density, low-power, nonvolatile,
long-endurance, etc. However, use of memory hierarchy, interconnect
architectures, and management policies, may take advantages of each
memory device and hide its drawbacks.

We introduce hybrid electrical energy storage (HESS for short) that are
comprised of multiple, heterogeneous storage banks connected via the
charge transfer interconnect (CTI). We introduce both design time and
runtime optimization of HESS. We formulate the HESS problems in the form
of computer memory system design, interconnect architecture, FPGA
placement and routing, and real-time task scheduling problems. This
enables us to utilize profound systematic optimization methods that have
been used in digital and computer systems design over decades.

Design time optimization includes HESS system architecture such as
number of banks, types of banks, capacity of banks, CTI architectures,
input and output converters, etc. We introduce various CTI architectures
such as a shared bus, multiple bus, and network architectures, like
computer interconnect architectures. We only take the advantages of each
electrical storage device while hiding its weaknesses by proper runtime
optimization because the HESS hardware architecture alone does not
guarantee superior performance than that of conventional homogeneous
ESS. HESS mandate elaborated runtime charge management policies like
memory management policies for the memory hierarchy. We set up the
hybrid electrical storage system management problems into charge
allocation that determines a part of storage banks to be charged, charge
replacement (discharge) that determines a part of storage banks to be
discharged. The charge allocation and replacement are performed to
achieve the best efficiency considering the power loss in the battery
(or supercapacitor) banks (IR loss, rate capacity effect, leakage, etc.)
and the power loss in the charger and converters, which significantly
varies by the input/output voltage and current. We provide charge
migration that moves charge among the storage banks as the best set of
banks for individual charge allocation and replacement process can be
different in general.

This talk introduces applications of HESS for home energy systems
including the grid-connected PV systems and full electric vehicle (FEV)
energy storage. A HESS combined with the grid-connected PV system
efficiently maximizes energy utilization of the PV panel resolving time
mismatch between the peak load demand and the maximum solar irradiance.
We demonstrate a HESS for FEV significantly enhances energy efficiency
during regenerative braking and acceleration.


Naehyuck Chang is a Professor with the Department of Electrical Engineering and Computer Science and the Vice Dean of College of
Engineering at SNU. His current research interests include low-power embedded systems, hybrid electrical energy storage systems, next-generation energy sources. He has served on the technical program committees in many EDA conferences, including DAC, International Conference on Computer Aided Design(ICCAD), International Symposium on
Low Power Electronics and Design (ISLPED), DATE, CODES+ISSS, and
ASP-DAC. He was a TPC (Co- )Chair of International Conference on
Embedded and Real-Time Computing Systems and Applications 2007, ISLPED
2009, ESTIMedia 2009 and 2010, and CODES+ISSS 2012, and will serve as
the TPC Chair of ICCD 2014, and the ASP-DAC 2015. He was the General
Vice-Chair of ISLPED 2010, General Chair of ISLPED 2011, and ESTIMedia
2011. He was an Associate Editor of IEEE Transactions on Circuits and
Systems-I, IEEE Transactions on Computer-Aided Design, ACM Transactions
on Design Automation of Electronic Systems, and ACM Transactions on
Embedded Computing Systems, Springer DAES, and was a Guest Editor of ACM
Transactions on Design Automation of Electronic Systems in 2010, and ACM
Transactions on Embedded Computing Systems in 2010 and 2011. He is the
ACM SIGDA Chair, an ACM Distinguished Scientist and a Fellow of IEEE.