Optimizing Hierarchical Schedules for Improved Control Performance
Embedded control systems typically consist of several control loops, with different parts of each control application being mapped onto different processors that communicate over one or more communication buses. In such setups, the system architecture and scheduling policies have a significant impact on control performance. In this paper we show how to optimally choose the parameters of hierarchical schedules on the commu- nication bus in order to improve multiple control performance metrics.
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